The present invention generally relates to the manufacture of semiconductor-on-insulator (SOI) devices, and, more specifically, relates to the manufacture of germanium-on-insulator (GOI) devices.
Traditional silicon-on-insulator (SOI) transistor devices typically have a gate defining a channel interposed between a source and a drain formed within an active region of an SOI substrate. Such SOI devices have several advantages over devices formed on conventional bulk substrates: the elimination of latch-up, improved radiation hardness, dynamic coupling, lower parasitic junction capacitance, and simplified device isolation and fabrication. Such advantages allow semiconductor device manufacturers to produce low-voltage, low-power, high-speed devices thereon. For example, metal-oxide semiconductor field effect transistors (MOSFETs) are commonly formed on SOI structures. However, MOSFETs formed on such SOI structures suffer from a short-channel effect.
The short-channel effect refers to the effect caused by reducing a xe2x80x9clongxe2x80x9d channel to a xe2x80x9cshortxe2x80x9d channel. A channel length is xe2x80x9clongxe2x80x9d where a depletion layer formed under the channel has a depth equal to its length. When a channel length is shortened to an extreme, the depletion layer extending from the drain side spreads in the direction of the source region and contacts with the depletion layer of the source side.
As a result, a potential barrier in the vicinity of the source is lowered by the drain voltage and a current flows by itself even when no voltage is applied to the gate electrode. In this case, an energy band between the source and the drain changes continuously. This is the punch-through effect which lowers the withstand voltage between the source and the drain.
While various countermeasures have been taken to reduce the short-channel effect described above, a general measure, which has been taken most frequently, is channel-doping. Channel-doping is a technique for suppressing the short-channel effect by doping a trace amount of an impurity element such as P (phosphorus) or B (boron) shallowly in the channel region (as disclosed in Japanese Patent Laid Open Nos. Hei. 4-206971, 4-286339 and others).
However, the channel-doping technique has a drawback in that it significantly restricts the field effect mobility (hereinafter referred to simply as a mobility) of the MOSFET. That is, the movement of carriers is hampered by the intentionally doped impurity, thus dropping the mobility.
Therefore, there exists a need in the art for a device formed on a semiconductor-on-insulator structure with increased performance and better characteristics enhanced by a higher mobility of an active layer as compared to a conventional silicon layer.
According to one aspect of the invention, the invention is a germaniumon-insulator (GOI) device formed on a GOI structure. In one embodiment, the device is a MOSFET. The MOSFET device includes a gate defining a channel (e.g. a p-type doped region) interposed between a source and a drain formed within one of the active regions defined by isolation trenches and a BOX layer.
According to another aspect of the invention, the invention is a method of fabricating a GOI device on a GOI structure. The method includes the step of forming a GOI structure. Additionally, the method includes the step of forming within an active region of a GOI structure a source and a drain with a channel interposed between. The method further includes the step of forming a gate on the active region of the GOI structure.